Espressif Systems /ESP32-P4 /TWAI0 /STATUS

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Interpret as STATUS

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RECEIVE_BUFFER)RECEIVE_BUFFER 0 (OVERRUN)OVERRUN 0 (TRANSMIT_BUFFER)TRANSMIT_BUFFER 0 (TRANSMISSION_COMPLETE)TRANSMISSION_COMPLETE 0 (RECEIVE)RECEIVE 0 (TRANSMIT)TRANSMIT 0 (ERR)ERR 0 (NODE_BUS_OFF)NODE_BUS_OFF 0 (MISS)MISS

Description

TWAI status register.

Fields

RECEIVE_BUFFER

1: full, one or more complete messages are available in the RXFIFO. 0: empty, no message is available

OVERRUN

1: overrun, a message was lost because there was not enough space for that message in the RXFIFO. 0: absent, no data overrun has occurred since the last clear data overrun command was given

TRANSMIT_BUFFER

1: released, the CPU may write a message into the transmit buffer. 0: locked, the CPU cannot access the transmit buffer, a message is either waiting for transmission or is in the process of being transmitted

TRANSMISSION_COMPLETE

1: complete, last requested transmission has been successfully completed. 0: incomplete, previously requested transmission is not yet completed

RECEIVE

1: receive, the TWAI controller is receiving a message. 0: idle

TRANSMIT

1: transmit, the TWAI controller is transmitting a message. 0: idle

ERR

1: error, at least one of the error counters has reached or exceeded the CPU warning limit defined by the Error Warning Limit Register (EWLR). 0: ok, both error counters are below the warning limit

NODE_BUS_OFF

1: bus-off, the TWAI controller is not involved in bus activities. 0: bus-on, the TWAI controller is involved in bus activities

MISS

1: current message is destroyed because of FIFO overflow.

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